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uxn
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Progress on merging shifts

This commit is contained in:
neauoire 2021-03-19 21:00:41 -07:00
parent 9f7e0edb84
commit d4a5d9e9cb
4 changed files with 15 additions and 9 deletions
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2
projects/examples/gui.editor.usm
View File

@ -46,7 +46,7 @@ BRK
,no-click ~Mouse.state #00 EQU JMP2?
( load ) ~editor.addr ~Mouse.y ~editor.y1 SUB2 #0008 DIV2 ADD2 LDR
( mask ) #01 #07 ~Mouse.x ~editor.x1 SUB2 #0008 DIV2 SWP POP SUB SHL
( mask ) #01 #07 ~Mouse.x ~editor.x1 SUB2 #0008 DIV2 SWP POP SUB #40 SFT SFT
ORA
( save ) ~editor.addr ~Mouse.y ~editor.y1 SUB2 #0008 DIV2 ADD2 STR

5
projects/software/nasu.usm
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@ -14,6 +14,7 @@
%2/ { #0001 SFT2 } %2* { #0001 SHL2 }
%8/ { #0003 SFT2 } %8* { #0003 SHL2 }
%8- { #0008 SUB2 } %8+ { #0008 ADD2 }
%SFL { #40 SFT SFT }
;bankview { x 2 y 2 mode 1 addr 2 }
;tileview { x 2 y 2 addr 2 }
@ -156,13 +157,13 @@ BRK
~MOUS.y ~tileview.y SUB2 ~MOUS.y ~tileview.y SUB2 #0040 DIV2 #0040 MUL2 SUB2 =pos.y
,no-erase-mode ~bankview.mode #02 NEQ JMP2?
( load ) ~addr ~pos.y 8/ ADD2 LDR
( mask ) #01 #07 ~pos.x 8/ SWP POP SUB SHL
( mask ) #01 #07 ~pos.x 8/ SWP POP SUB SFL
#ff XOR AND
( save ) ~addr ~pos.y 8/ ADD2 STR
,redraw JSR2 ,click-end JMP2
@no-erase-mode
( load ) ~addr ~pos.y 8/ ADD2 LDR
( mask ) #01 #07 ~pos.x 8/ SWP POP SUB SHL
( mask ) #01 #07 ~pos.x 8/ SWP POP SUB SFL
ORA
( save ) ~addr ~pos.y 8/ ADD2 STR
,redraw JSR2 ,click-end JMP2

5
projects/software/noodle.usm
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@ -25,6 +25,7 @@
%8/ { #0003 SFT2 } %8* { #0003 SHL2 }
%8+ { #0008 ADD2 }
%MOD8 { #0007 AND2 }
%SFL { #40 SFT SFT }
;center { x 2 y 2 }
;toolbar { x1 2 y1 2 x2 2 y2 2 }
@ -345,7 +346,7 @@ RTN
=pt1.y =pt1.x
( get tile addr ) ,data ~pt1.x 8/ ~pt1.y 8/ ~canvas.w MUL2 ADD2 8* ~pt1.y MOD8 ADD2 ADD2
( load ) DUP2 LDR
( mask ) #01 #07 ~pt1.x MOD8 SWP POP SUB SHL ORA
( mask ) #01 #07 ~pt1.x MOD8 SWP POP SUB SFL ORA
( save ) ROT ROT STR
RTN
@ -355,7 +356,7 @@ RTN
=pt1.y =pt1.x
( get tile addr ) ,data ~pt1.x 8/ ~pt1.y 8/ ~canvas.w MUL2 ADD2 8* ~pt1.y MOD8 ADD2 ADD2
( load ) DUP2 LDR
( mask ) #01 #07 ~pt1.x MOD8 SWP POP SUB SHL #ff XOR AND
( mask ) #01 #07 ~pt1.x MOD8 SWP POP SUB SFL #ff XOR AND
( save ) ROT ROT STR
RTN

12
uxn.c
View File

@ -42,7 +42,11 @@ void op_and(Uxn *u) { Uint8 a = pop8(u->src), b = pop8(u->src); push8(u->src, b
void op_ora(Uxn *u) { Uint8 a = pop8(u->src), b = pop8(u->src); push8(u->src, b | a); }
void op_xor(Uxn *u) { Uint8 a = pop8(u->src), b = pop8(u->src); push8(u->src, b ^ a); }
void op_shl(Uxn *u) { Uint8 a = pop8(u->src), b = pop8(u->src); push8(u->src, b << (a % 8)); }
void op_shr(Uxn *u) { Uint8 a = pop8(u->src), b = pop8(u->src); push8(u->src, b >> (a % 8)); }
void op_sft(Uxn *u) { Uint8 a = pop8(u->src), b = pop8(u->src);
Uint8 left = (a & 0xf0) >> 4;
Uint8 right = (a & 0x0f);
push8(u->src, b << (left % 8) >> (right % 8));
}
/* Stack */
void op_pop(Uxn *u) { pop8(u->src); }
void op_dup(Uxn *u) { push8(u->src, peek8(u->src, 0)); }
@ -71,7 +75,7 @@ void op_and16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push16(u->s
void op_ora16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push16(u->src, b | a); }
void op_xor16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push16(u->src, b ^ a); }
void op_shl16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push16(u->src, b << (a % 16)); }
void op_shr16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push16(u->src, b >> (a % 16)); }
void op_sft16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push16(u->src, b >> (a % 16)); }
/* Stack(16-bits) */
void op_pop16(Uxn *u) { pop16(u->src); }
void op_dup16(Uxn *u) { push16(u->src, peek16(u->src, 0)); }
@ -92,12 +96,12 @@ void op_lth16(Uxn *u) { Uint16 a = pop16(u->src), b = pop16(u->src); push8(u->sr
void (*ops[])(Uxn *u) = {
op_brk, op_nop, op_lit, op_ldr, op_str, op_nop, op_jmp, op_jsr,
op_equ, op_neq, op_gth, op_lth, op_and, op_ora, op_shl, op_shr,
op_equ, op_neq, op_gth, op_lth, op_and, op_ora, op_shl, op_sft,
op_pop, op_dup, op_swp, op_ovr, op_rot, op_nop, op_cln, op_sth,
op_add, op_sub, op_mul, op_div, op_nop, op_nop, op_nop, op_xor,
/* 16-bit */
op_brk, op_nop16, op_lit16, op_ldr16, op_str16, op_nop, op_jmp16, op_jsr16,
op_equ16, op_neq16, op_gth16, op_lth16, op_and16, op_ora16, op_shl16, op_shr16,
op_equ16, op_neq16, op_gth16, op_lth16, op_and16, op_ora16, op_shl16, op_sft16,
op_pop16, op_dup16, op_swp16, op_ovr16, op_rot16, op_nop, op_cln16, op_sth16,
op_add16, op_sub16, op_mul16, op_div16, op_nop, op_nop, op_nop, op_xor16
};