ryujinx-mirror/ARMeilleure/CodeGen
gdkchan f0824fde9f
Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)
* Add host CPU memory barriers for DMB/DSB and ordered load/store

* PPTC version bump

* Revert to old barrier order
2022-01-21 12:47:34 -03:00
..
Linking Add Operand.Label support to Assembler (#2680) 2021-10-05 14:04:55 -03:00
Optimizations Add an early TailMerge pass (#2721) 2021-10-18 19:51:22 -03:00
RegisterAllocators Optimize LSRA (#2563) 2021-10-08 18:15:44 -03:00
Unwinding PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
X86 Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015) 2022-01-21 12:47:34 -03:00
CompiledFunction.cs Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00