ryujinx-mirror/ARMeilleure/CodeGen
merry f5235fff29
ARMeilleure: Hardware accelerate SHA256 (#3585)
* ARMeilleure/HardwareCapabilities: Add Sha

* ARMeilleure/Intrinsic: Add X86Sha256Rnds2

* ARmeilleure: Hardware accelerate SHA256H/SHA256H2

* ARMeilleure/Intrinsic: Add X86Sha256Msg1, X86Sha256Msg2

* ARMeilleure/Intrinsic: Add X86Palignr

* ARMeilleure: Hardware accelerate SHA256SU0, SHA256SU1

* PTC: Bump InternalVersion
2022-08-25 10:12:13 +00:00
..
Linking A few minor documentation fixes. (#3599) 2022-08-19 18:21:06 -03:00
Optimizations Fix tail merge from block with conditional jump to multiple returns (#3267) 2022-04-09 16:56:50 +02:00
RegisterAllocators Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
Unwinding PPTC Follow-up. (#1712) 2020-12-17 20:32:09 +01:00
X86 ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
CompiledFunction.cs Refactor PtcInfo (#2625) 2021-09-14 01:23:37 +02:00