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https://github.com/ryujinx-mirror/ryujinx.git
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ff5df5d8a1
* Support non-contiguous copies on I2M and DMA engines * Vector copy should start aligned on I2M * Nits * Zero extend the offset
239 lines
7.9 KiB
C#
239 lines
7.9 KiB
C#
using Ryujinx.Common;
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using Ryujinx.Graphics.Device;
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using Ryujinx.Graphics.Texture;
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using System;
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using System.Collections.Generic;
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using System.Runtime.InteropServices;
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using System.Runtime.Intrinsics;
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namespace Ryujinx.Graphics.Gpu.Engine.InlineToMemory
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{
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/// <summary>
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/// Represents a Inline-to-Memory engine class.
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/// </summary>
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class InlineToMemoryClass : IDeviceState
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{
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private readonly GpuContext _context;
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private readonly GpuChannel _channel;
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private readonly DeviceState<InlineToMemoryClassState> _state;
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private bool _isLinear;
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private int _offset;
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private int _size;
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private ulong _dstGpuVa;
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private int _dstX;
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private int _dstY;
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private int _dstWidth;
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private int _dstHeight;
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private int _dstStride;
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private int _dstGobBlocksInY;
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private int _lineLengthIn;
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private int _lineCount;
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private bool _finished;
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private int[] _buffer;
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/// <summary>
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/// Creates a new instance of the Inline-to-Memory engine class.
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/// </summary>
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/// <param name="context">GPU context</param>
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/// <param name="channel">GPU channel</param>
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/// <param name="initializeState">Indicates if the internal state should be initialized. Set to false if part of another engine</param>
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public InlineToMemoryClass(GpuContext context, GpuChannel channel, bool initializeState)
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{
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_context = context;
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_channel = channel;
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if (initializeState)
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{
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_state = new DeviceState<InlineToMemoryClassState>(new Dictionary<string, RwCallback>
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{
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{ nameof(InlineToMemoryClassState.LaunchDma), new RwCallback(LaunchDma, null) },
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{ nameof(InlineToMemoryClassState.LoadInlineData), new RwCallback(LoadInlineData, null) }
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});
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}
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}
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/// <summary>
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/// Creates a new instance of the inline-to-memory engine class.
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/// </summary>
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/// <param name="context">GPU context</param>
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/// <param name="channel">GPU channel</param>
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public InlineToMemoryClass(GpuContext context, GpuChannel channel) : this(context, channel, true)
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{
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}
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/// <summary>
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/// Reads data from the class registers.
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/// </summary>
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/// <param name="offset">Register byte offset</param>
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/// <returns>Data at the specified offset</returns>
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public int Read(int offset) => _state.Read(offset);
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/// <summary>
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/// Writes data to the class registers.
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/// </summary>
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/// <param name="offset">Register byte offset</param>
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/// <param name="data">Data to be written</param>
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public void Write(int offset, int data) => _state.Write(offset, data);
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/// <summary>
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/// Launches Inline-to-Memory engine DMA copy.
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/// </summary>
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/// <param name="argument">Method call argument</param>
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private void LaunchDma(int argument)
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{
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LaunchDma(ref _state.State, argument);
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}
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/// <summary>
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/// Launches Inline-to-Memory engine DMA copy.
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/// </summary>
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/// <param name="state">Current class state</param>
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/// <param name="argument">Method call argument</param>
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public void LaunchDma(ref InlineToMemoryClassState state, int argument)
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{
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_isLinear = (argument & 1) != 0;
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_offset = 0;
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_size = (int)(state.LineLengthIn * state.LineCount);
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int count = BitUtils.DivRoundUp(_size, 4);
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if (_buffer == null || _buffer.Length < count)
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{
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_buffer = new int[count];
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}
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ulong dstGpuVa = ((ulong)state.OffsetOutUpperValue << 32) | state.OffsetOut;
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ulong dstBaseAddress = _channel.MemoryManager.Translate(dstGpuVa);
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// Trigger read tracking, to flush any managed resources in the destination region.
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_channel.MemoryManager.Physical.GetSpan(dstBaseAddress, _size, true);
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_dstGpuVa = dstGpuVa;
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_dstX = state.SetDstOriginBytesXV;
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_dstY = state.SetDstOriginSamplesYV;
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_dstWidth = (int)state.SetDstWidth;
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_dstHeight = (int)state.SetDstHeight;
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_dstStride = (int)state.PitchOut;
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_dstGobBlocksInY = 1 << (int)state.SetDstBlockSizeHeight;
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_lineLengthIn = (int)state.LineLengthIn;
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_lineCount = (int)state.LineCount;
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_finished = false;
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}
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/// <summary>
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/// Pushes a block of data to the Inline-to-Memory engine.
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/// </summary>
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/// <param name="data">Data to push</param>
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public void LoadInlineData(ReadOnlySpan<int> data)
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{
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if (!_finished)
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{
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int copySize = Math.Min(data.Length, _buffer.Length - _offset);
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data.Slice(0, copySize).CopyTo(new Span<int>(_buffer).Slice(_offset, copySize));
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_offset += copySize;
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if (_offset * 4 >= _size)
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{
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FinishTransfer();
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}
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}
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}
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/// <summary>
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/// Pushes a word of data to the Inline-to-Memory engine.
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/// </summary>
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/// <param name="argument">Method call argument</param>
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public void LoadInlineData(int argument)
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{
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if (!_finished)
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{
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_buffer[_offset++] = argument;
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if (_offset * 4 >= _size)
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{
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FinishTransfer();
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}
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}
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}
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/// <summary>
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/// Performs actual copy of the inline data after the transfer is finished.
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/// </summary>
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private void FinishTransfer()
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{
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var memoryManager = _channel.MemoryManager;
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var data = MemoryMarshal.Cast<int, byte>(_buffer).Slice(0, _size);
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if (_isLinear && _lineCount == 1)
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{
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memoryManager.Write(_dstGpuVa, data);
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}
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else
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{
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var dstCalculator = new OffsetCalculator(
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_dstWidth,
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_dstHeight,
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_dstStride,
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_isLinear,
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_dstGobBlocksInY,
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1);
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int srcOffset = 0;
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for (int y = _dstY; y < _dstY + _lineCount; y++)
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{
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int x1 = _dstX;
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int x2 = _dstX + _lineLengthIn;
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int x1Round = BitUtils.AlignUp(_dstX, 16);
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int x2Trunc = BitUtils.AlignDown(x2, 16);
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int x = x1;
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if (x1Round <= x2)
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{
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for (; x < x1Round; x++, srcOffset++)
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{
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int dstOffset = dstCalculator.GetOffset(x, y);
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ulong dstAddress = _dstGpuVa + (uint)dstOffset;
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memoryManager.Write(dstAddress, data[srcOffset]);
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}
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}
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for (; x < x2Trunc; x += 16, srcOffset += 16)
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{
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int dstOffset = dstCalculator.GetOffset(x, y);
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ulong dstAddress = _dstGpuVa + (uint)dstOffset;
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memoryManager.Write(dstAddress, MemoryMarshal.Cast<byte, Vector128<byte>>(data.Slice(srcOffset, 16))[0]);
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}
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for (; x < x2; x++, srcOffset++)
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{
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int dstOffset = dstCalculator.GetOffset(x, y);
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ulong dstAddress = _dstGpuVa + (uint)dstOffset;
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memoryManager.Write(dstAddress, data[srcOffset]);
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}
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}
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}
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_finished = true;
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_context.AdvanceSequence();
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}
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}
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}
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