mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-12-05 16:27:25 +00:00
208 lines
No EOL
5.4 KiB
C#
208 lines
No EOL
5.4 KiB
C#
using ChocolArm64.Decoder;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System.Reflection.Emit;
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namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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public static void Bfm(AILEmitterCtx Context)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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EmitBfmLoadRn(Context);
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Context.EmitLdintzr(Op.Rd);
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Context.EmitLdc_I(~Op.WMask & Op.TMask);
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Context.Emit(OpCodes.And);
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Context.Emit(OpCodes.Or);
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Context.EmitLdintzr(Op.Rd);
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Context.EmitLdc_I(~Op.TMask);
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Context.Emit(OpCodes.And);
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Context.Emit(OpCodes.Or);
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Context.EmitStintzr(Op.Rd);
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}
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public static void Sbfm(AILEmitterCtx Context)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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int BitsCount = Op.GetBitsCount();
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if (Op.Pos + 1 == BitsCount)
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{
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EmitSbfmShift(Context);
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}
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else if (Op.Pos < Op.Shift)
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{
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EmitSbfiz(Context);
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}
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else if (Op.Pos == 7 && Op.Shift == 0)
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{
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EmitSbfmCast(Context, OpCodes.Conv_I1);
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}
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else if (Op.Pos == 15 && Op.Shift == 0)
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{
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EmitSbfmCast(Context, OpCodes.Conv_I2);
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}
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else if (Op.Pos == 31 && Op.Shift == 0)
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{
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EmitSbfmCast(Context, OpCodes.Conv_I4);
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}
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else
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{
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EmitBfmLoadRn(Context);
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Context.EmitLdintzr(Op.Rn);
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Context.EmitLsl(BitsCount - 1 - Op.Pos);
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Context.EmitAsr(BitsCount - 1);
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Context.EmitLdc_I(~Op.TMask);
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Context.Emit(OpCodes.And);
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Context.Emit(OpCodes.Or);
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Context.EmitStintzr(Op.Rd);
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}
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}
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public static void Ubfm(AILEmitterCtx Context)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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if (Op.Pos + 1 == Op.GetBitsCount())
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{
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EmitUbfmShift(Context);
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}
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else if (Op.Pos < Op.Shift)
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{
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EmitUbfiz(Context);
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}
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else if (Op.Pos + 1 == Op.Shift)
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{
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EmitBfmLsl(Context);
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}
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else if (Op.Pos == 7 && Op.Shift == 0)
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{
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EmitUbfmCast(Context, OpCodes.Conv_U1);
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}
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else if (Op.Pos == 15 && Op.Shift == 0)
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{
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EmitUbfmCast(Context, OpCodes.Conv_U2);
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}
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else
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{
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EmitBfmLoadRn(Context);
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Context.EmitStintzr(Op.Rd);
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}
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}
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private static void EmitSbfiz(AILEmitterCtx Context) => EmitBfiz(Context, true);
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private static void EmitUbfiz(AILEmitterCtx Context) => EmitBfiz(Context, false);
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private static void EmitBfiz(AILEmitterCtx Context, bool Signed)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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int Width = Op.Pos + 1;
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Context.EmitLdintzr(Op.Rn);
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Context.EmitLsl(Op.GetBitsCount() - Width);
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if (Signed)
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{
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Context.EmitAsr(Op.Shift - Width);
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}
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else
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{
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Context.EmitLsr(Op.Shift - Width);
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}
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Context.EmitStintzr(Op.Rd);
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}
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private static void EmitSbfmCast(AILEmitterCtx Context, OpCode ILOp)
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{
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EmitBfmCast(Context, ILOp, true);
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}
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private static void EmitUbfmCast(AILEmitterCtx Context, OpCode ILOp)
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{
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EmitBfmCast(Context, ILOp, false);
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}
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private static void EmitBfmCast(AILEmitterCtx Context, OpCode ILOp, bool Signed)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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Context.Emit(ILOp);
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if (Op.RegisterSize != ARegisterSize.Int32)
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{
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Context.Emit(Signed
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? OpCodes.Conv_I8
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: OpCodes.Conv_U8);
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}
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Context.EmitStintzr(Op.Rd);
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}
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private static void EmitSbfmShift(AILEmitterCtx Context)
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{
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EmitBfmShift(Context, true);
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}
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private static void EmitUbfmShift(AILEmitterCtx Context)
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{
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EmitBfmShift(Context, false);
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}
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private static void EmitBfmShift(AILEmitterCtx Context, bool Signed)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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Context.EmitLdc_I4(Op.Shift);
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Context.Emit(Signed
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? OpCodes.Shr
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: OpCodes.Shr_Un);
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Context.EmitStintzr(Op.Rd);
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}
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private static void EmitBfmLsl(AILEmitterCtx Context)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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Context.EmitLsl(Op.GetBitsCount() - Op.Shift);
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Context.EmitStintzr(Op.Rd);
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}
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private static void EmitBfmLoadRn(AILEmitterCtx Context)
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{
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AOpCodeBfm Op = (AOpCodeBfm)Context.CurrOp;
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Context.EmitLdintzr(Op.Rn);
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Context.EmitRor(Op.Shift);
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Context.EmitLdc_I(Op.WMask & Op.TMask);
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Context.Emit(OpCodes.And);
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}
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}
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} |