mirror of
https://github.com/ryujinx-mirror/ryujinx.git
synced 2024-12-05 08:17:25 +00:00
0c1ea1212a
* Add initial implementation of the Tamper Machine * Implement Atmosphere opcodes 0, 4 and 9 * Add missing TamperCompilationException class * Implement Atmosphere conditional and loop opcodes 1, 2 and 3 * Inplement input conditional opcode 8 * Add register store opcode A * Implement extended pause/resume opcodes FF0 and FF1 * Implement extended log opcode FFF * Implement extended register conditional opcode C0 * Refactor TamperProgram to an interface * Moved Atmosphere classes to a separate subdirectory * Fix OpProcCtrl class not setting process * Implement extended register save/restore opcodes C1, C2 and C3 * Refactor code emitters to separate classes * Supress memory access errors from the Tamper Machine * Add debug information to tamper register and memory writes * Add block stack check to Atmosphere Cheat compiler * Add handheld input support to Tamper Machine * Fix code styling * Fix build id and cheat case mismatch * Fix invalid immediate size selection * Print build ids of the title * Prevent Tamper Machine from change code regions * Remove Atmosphere namespace * Remove empty cheats from the list * Prevent code modification without disabling the tampering * Fix missing addressing mode in LoadRegisterWithMemory * Fix wrong addressing in RegisterConditional * Add name to the tamper machine thread * Fix code styling
105 lines
4.8 KiB
C#
105 lines
4.8 KiB
C#
using Ryujinx.HLE.Exceptions;
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using Ryujinx.HLE.HOS.Tamper.Operations;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.HLE.HOS.Tamper.CodeEmitters
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{
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/// <summary>
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/// Code type 9 allows performing arithmetic on registers.
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/// </summary>
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class Arithmetic
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{
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private const int OperationWidthIndex = 1;
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private const int OperationTypeIndex = 2;
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private const int DestinationRegisterIndex = 3;
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private const int LeftHandSideRegisterIndex = 4;
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private const int UseImmediateAsRhsIndex = 5;
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private const int RightHandSideRegisterIndex = 6;
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private const int RightHandSideImmediateIndex = 8;
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private const int RightHandSideImmediate8 = 8;
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private const int RightHandSideImmediate16 = 16;
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private const byte Add = 0; // lhs + rhs
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private const byte Sub = 1; // lhs - rhs
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private const byte Mul = 2; // lhs * rhs
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private const byte Lsh = 3; // lhs << rhs
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private const byte Rsh = 4; // lhs >> rhs
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private const byte And = 5; // lhs & rhs
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private const byte Or = 6; // lhs | rhs
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private const byte Not = 7; // ~lhs (discards right-hand operand)
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private const byte Xor = 8; // lhs ^ rhs
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private const byte Mov = 9; // lhs (discards right-hand operand)
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public static void Emit(byte[] instruction, CompilationContext context)
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{
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// 9TCRS0s0
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// T: Width of arithmetic operation(1, 2, 4, or 8 bytes).
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// C: Arithmetic operation to apply, see below.
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// R: Register to store result in.
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// S: Register to use as left - hand operand.
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// s: Register to use as right - hand operand.
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// 9TCRS100 VVVVVVVV (VVVVVVVV)
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// T: Width of arithmetic operation(1, 2, 4, or 8 bytes).
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// C: Arithmetic operation to apply, see below.
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// R: Register to store result in.
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// S: Register to use as left - hand operand.
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// V: Value to use as right - hand operand.
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byte operationWidth = instruction[OperationWidthIndex];
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byte operation = instruction[OperationTypeIndex];
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Register destinationRegister = context.GetRegister(instruction[DestinationRegisterIndex]);
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Register leftHandSideRegister = context.GetRegister(instruction[LeftHandSideRegisterIndex]);
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byte rightHandSideIsImmediate = instruction[UseImmediateAsRhsIndex];
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IOperand rightHandSideOperand;
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switch (rightHandSideIsImmediate)
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{
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case 0:
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// Use a register as right-hand side.
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rightHandSideOperand = context.GetRegister(instruction[RightHandSideRegisterIndex]);
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break;
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case 1:
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// Use an immediate as right-hand side.
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int immediateSize = operationWidth <= 4 ? RightHandSideImmediate8 : RightHandSideImmediate16;
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ulong immediate = InstructionHelper.GetImmediate(instruction, RightHandSideImmediateIndex, immediateSize);
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rightHandSideOperand = new Value<ulong>(immediate);
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break;
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default:
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throw new TamperCompilationException($"Invalid right-hand side switch {rightHandSideIsImmediate} in Atmosphere cheat");
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}
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void Emit(Type operationType, IOperand rhs = null)
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{
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List<IOperand> operandList = new List<IOperand>();
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operandList.Add(destinationRegister);
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operandList.Add(leftHandSideRegister);
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if (rhs != null)
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{
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operandList.Add(rhs);
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}
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InstructionHelper.Emit(operationType, operationWidth, context, operandList.ToArray());
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}
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switch (operation)
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{
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case Add: Emit(typeof(OpAdd<>), rightHandSideOperand); break;
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case Sub: Emit(typeof(OpSub<>), rightHandSideOperand); break;
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case Mul: Emit(typeof(OpMul<>), rightHandSideOperand); break;
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case Lsh: Emit(typeof(OpLsh<>), rightHandSideOperand); break;
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case Rsh: Emit(typeof(OpRsh<>), rightHandSideOperand); break;
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case And: Emit(typeof(OpAnd<>), rightHandSideOperand); break;
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case Or: Emit(typeof(OpOr<> ), rightHandSideOperand); break;
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case Not: Emit(typeof(OpNot<>) ); break;
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case Xor: Emit(typeof(OpXor<>), rightHandSideOperand); break;
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case Mov: Emit(typeof(OpMov<>) ); break;
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default:
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throw new TamperCompilationException($"Invalid arithmetic operation {operation} in Atmosphere cheat");
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}
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}
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}
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}
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