mirror of
https://github.com/ryujinx-mirror/ryujinx.git
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9cb57fb4bb
* Change naming convention for Ryujinx project * Change naming convention for ChocolArm64 project * Fix NaN * Remove unneeded this. from Ryujinx project * Adjust naming from new PRs * Name changes based on feedback * How did this get removed? * Rebasing fix * Change FP enum case * Remove prefix from ChocolArm64 classes - Part 1 * Remove prefix from ChocolArm64 classes - Part 2 * Fix alignment from last commit's renaming * Rename namespaces * Rename stragglers * Fix alignment * Rename OpCode class * Missed a few * Adjust alignment
192 lines
No EOL
6 KiB
C#
192 lines
No EOL
6 KiB
C#
using ChocolArm64.Decoders;
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using ChocolArm64.Memory;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System;
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using System.Reflection.Emit;
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using System.Threading;
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using static ChocolArm64.Instructions.InstEmitMemoryHelper;
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namespace ChocolArm64.Instructions
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{
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static partial class InstEmit
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{
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[Flags]
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private enum AccessType
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{
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None = 0,
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Ordered = 1,
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Exclusive = 2,
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OrderedEx = Ordered | Exclusive
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}
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public static void Clrex(ILEmitterCtx context)
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{
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EmitMemoryCall(context, nameof(MemoryManager.ClearExclusive));
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}
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public static void Dmb(ILEmitterCtx context) => EmitBarrier(context);
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public static void Dsb(ILEmitterCtx context) => EmitBarrier(context);
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public static void Ldar(ILEmitterCtx context) => EmitLdr(context, AccessType.Ordered);
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public static void Ldaxr(ILEmitterCtx context) => EmitLdr(context, AccessType.OrderedEx);
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public static void Ldxr(ILEmitterCtx context) => EmitLdr(context, AccessType.Exclusive);
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public static void Ldxp(ILEmitterCtx context) => EmitLdp(context, AccessType.Exclusive);
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public static void Ldaxp(ILEmitterCtx context) => EmitLdp(context, AccessType.OrderedEx);
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private static void EmitLdr(ILEmitterCtx context, AccessType accType)
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{
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EmitLoad(context, accType, false);
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}
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private static void EmitLdp(ILEmitterCtx context, AccessType accType)
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{
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EmitLoad(context, accType, true);
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}
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private static void EmitLoad(ILEmitterCtx context, AccessType accType, bool pair)
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{
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OpCodeMemEx64 op = (OpCodeMemEx64)context.CurrOp;
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bool ordered = (accType & AccessType.Ordered) != 0;
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bool exclusive = (accType & AccessType.Exclusive) != 0;
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if (ordered)
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{
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EmitBarrier(context);
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}
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if (exclusive)
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{
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EmitMemoryCall(context, nameof(MemoryManager.SetExclusive), op.Rn);
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}
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context.EmitLdint(op.Rn);
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context.EmitSttmp();
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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EmitReadZxCall(context, op.Size);
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context.EmitStintzr(op.Rt);
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if (pair)
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdtmp();
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context.EmitLdc_I8(1 << op.Size);
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context.Emit(OpCodes.Add);
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EmitReadZxCall(context, op.Size);
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context.EmitStintzr(op.Rt2);
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}
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}
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public static void Pfrm(ILEmitterCtx context)
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{
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//Memory Prefetch, execute as no-op.
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}
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public static void Stlr(ILEmitterCtx context) => EmitStr(context, AccessType.Ordered);
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public static void Stlxr(ILEmitterCtx context) => EmitStr(context, AccessType.OrderedEx);
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public static void Stxr(ILEmitterCtx context) => EmitStr(context, AccessType.Exclusive);
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public static void Stxp(ILEmitterCtx context) => EmitStp(context, AccessType.Exclusive);
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public static void Stlxp(ILEmitterCtx context) => EmitStp(context, AccessType.OrderedEx);
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private static void EmitStr(ILEmitterCtx context, AccessType accType)
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{
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EmitStore(context, accType, false);
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}
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private static void EmitStp(ILEmitterCtx context, AccessType accType)
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{
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EmitStore(context, accType, true);
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}
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private static void EmitStore(ILEmitterCtx context, AccessType accType, bool pair)
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{
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OpCodeMemEx64 op = (OpCodeMemEx64)context.CurrOp;
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bool ordered = (accType & AccessType.Ordered) != 0;
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bool exclusive = (accType & AccessType.Exclusive) != 0;
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if (ordered)
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{
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EmitBarrier(context);
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}
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ILLabel lblEx = new ILLabel();
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ILLabel lblEnd = new ILLabel();
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if (exclusive)
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{
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EmitMemoryCall(context, nameof(MemoryManager.TestExclusive), op.Rn);
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context.Emit(OpCodes.Brtrue_S, lblEx);
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context.EmitLdc_I8(1);
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context.EmitStintzr(op.Rs);
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context.Emit(OpCodes.Br_S, lblEnd);
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}
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context.MarkLabel(lblEx);
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdint(op.Rn);
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context.EmitLdintzr(op.Rt);
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EmitWriteCall(context, op.Size);
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if (pair)
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdint(op.Rn);
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context.EmitLdc_I8(1 << op.Size);
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context.Emit(OpCodes.Add);
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context.EmitLdintzr(op.Rt2);
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EmitWriteCall(context, op.Size);
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}
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if (exclusive)
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{
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context.EmitLdc_I8(0);
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context.EmitStintzr(op.Rs);
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EmitMemoryCall(context, nameof(MemoryManager.ClearExclusiveForStore));
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}
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context.MarkLabel(lblEnd);
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}
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private static void EmitMemoryCall(ILEmitterCtx context, string name, int rn = -1)
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{
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context.EmitLdarg(TranslatedSub.MemoryArgIdx);
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context.EmitLdarg(TranslatedSub.StateArgIdx);
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context.EmitCallPropGet(typeof(CpuThreadState), nameof(CpuThreadState.Core));
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if (rn != -1)
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{
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context.EmitLdint(rn);
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}
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context.EmitCall(typeof(MemoryManager), name);
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}
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private static void EmitBarrier(ILEmitterCtx context)
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{
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//Note: This barrier is most likely not necessary, and probably
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//doesn't make any difference since we need to do a ton of stuff
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//(software MMU emulation) to read or write anything anyway.
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context.EmitCall(typeof(Thread), nameof(Thread.MemoryBarrier));
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}
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}
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} |