ryujinx-mirror/ChocolArm64
LDj3SNuD 74da8785a5 Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662)
* Update CpuTestSimdCvt.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdShImm.cs

* Update InstEmitSimdCvt.cs

* Update OpCodeTable.cs

* Update InstEmitSimdCvt.cs
2019-04-20 23:07:35 -03:00
..
Decoders Implement fixed-point variant of the UCVTF and SCVTF instructions (#578) 2019-02-23 20:52:48 -03:00
Events Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
Instructions Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) 2019-04-20 23:07:35 -03:00
Memory Optimize address translation and write tracking on the MMU (#571) 2019-02-24 18:24:35 +11:00
State ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
Translation Add Tbl_V Sse opt. with Tests. (#651) 2019-03-23 15:50:19 -03:00
ChocolArm64.csproj ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
CpuThread.cs ARM exclusive monitor and multicore fixes (#589) 2019-02-19 10:52:06 +11:00
OpCodeTable.cs Sse optimized the 32-bit Vector & Scalar integer-to-fp conversion instructions (signed & unsigned); added the related Gp & V_Fixed Tests (signed & unsigned). (#662) 2019-04-20 23:07:35 -03:00
Optimizations.cs Misc. CPU optimizations (#575) 2019-02-28 13:03:31 +11:00