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https://github.com/ryujinx-mirror/ryujinx.git
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Fixes to memory management
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parent
ccc9ce1908
commit
7f4a190665
6 changed files with 51 additions and 72 deletions
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@ -5,7 +5,7 @@ namespace ChocolArm64.Exceptions
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{
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public class VmmAccessViolationException : Exception
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{
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private const string ExMsg = "Value at address 0x{0:x16} could not be \"{1}\"!";
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private const string ExMsg = "Address 0x{0:x16} does not have \"{1}\" permission!";
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public VmmAccessViolationException() { }
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@ -5,14 +5,16 @@ namespace ChocolArm64.Memory
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public long Position { get; private set; }
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public long Size { get; private set; }
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public int Type { get; private set; }
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public int Attr { get; private set; }
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public AMemoryPerm Perm { get; private set; }
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public AMemoryMapInfo(long Position, long Size, int Type, AMemoryPerm Perm)
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public AMemoryMapInfo(long Position, long Size, int Type, int Attr, AMemoryPerm Perm)
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{
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this.Position = Position;
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this.Size = Size;
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this.Type = Type;
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this.Attr = Attr;
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this.Perm = Perm;
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}
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}
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@ -1,5 +1,3 @@
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using System.Runtime.CompilerServices;
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namespace ChocolArm64.Memory
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{
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public class AMemoryMgr
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@ -27,24 +25,23 @@ namespace ChocolArm64.Memory
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private enum PTMap
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{
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Unmapped,
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Physical,
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Mirror
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Mapped
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}
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private struct PTEntry
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{
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public long Position;
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public int Type;
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public PTMap Map;
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public AMemoryPerm Perm;
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public PTEntry(long Position, int Type, PTMap Map, AMemoryPerm Perm)
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public int Type;
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public int Attr;
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public PTEntry(PTMap Map, AMemoryPerm Perm, int Type, int Attr)
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{
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this.Position = Position;
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this.Type = Type;
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this.Map = Map;
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this.Perm = Perm;
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this.Type = Type;
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this.Attr = Attr;
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}
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}
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@ -53,7 +50,7 @@ namespace ChocolArm64.Memory
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private bool IsHeapInitialized;
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public long HeapAddr { get; private set; }
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public int HeapSize { get; private set; }
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public long HeapSize { get; private set; }
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public AMemoryMgr(AMemoryAlloc Allocator)
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{
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@ -101,10 +98,10 @@ namespace ChocolArm64.Memory
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return false;
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}
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public void SetHeapSize(int Size, int Type)
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public void SetHeapSize(long Size, int Type)
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{
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//TODO: Return error when theres no enough space to allocate heap.
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Size = (int)AMemoryHelper.PageRoundUp(Size);
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Size = AMemoryHelper.PageRoundUp(Size);
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long Position = HeapAddr;
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@ -132,40 +129,13 @@ namespace ChocolArm64.Memory
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HeapSize = Size;
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}
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public bool MapPhys(long Src, long Dst, long Size, int Type, AMemoryPerm Perm)
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{
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Src = AMemoryHelper.PageRoundDown(Src);
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Dst = AMemoryHelper.PageRoundDown(Dst);
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Size = AMemoryHelper.PageRoundUp(Size);
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if (Dst < 0 || Dst + Size >= RamSize)
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{
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return false;
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}
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long PagesCount = Size / PageSize;
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while (PagesCount-- > 0)
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{
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SetPTEntry(Src, new PTEntry(Dst, Type, PTMap.Physical, Perm));
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Src += PageSize;
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Dst += PageSize;
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}
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return true;
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}
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public void MapPhys(long Position, long Size, int Type, AMemoryPerm Perm)
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{
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while (Size > 0)
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{
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if (!IsMapped(Position))
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{
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long PhysPos = Allocator.Alloc(PageSize);
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SetPTEntry(Position, new PTEntry(PhysPos, Type, PTMap.Physical, Perm));
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SetPTEntry(Position, new PTEntry(PTMap.Mapped, Perm, Type, 0));
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}
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long CPgSize = PageSize - (Position & PageMask);
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@ -186,13 +156,19 @@ namespace ChocolArm64.Memory
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while (PagesCount-- > 0)
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{
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PTEntry Entry = GetPTEntry(Src);
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PTEntry SrcEntry = GetPTEntry(Src);
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PTEntry DstEntry = GetPTEntry(Dst);
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Entry.Type = Type;
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Entry.Map = PTMap.Mirror;
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Entry.Position = Dst;
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DstEntry.Map = PTMap.Mapped;
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DstEntry.Type = Type;
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DstEntry.Perm = SrcEntry.Perm;
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SetPTEntry(Src, Entry);
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SrcEntry.Perm = AMemoryPerm.None;
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SrcEntry.Attr |= 1;
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SetPTEntry(Src, SrcEntry);
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SetPTEntry(Dst, DstEntry);
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Src += PageSize;
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Dst += PageSize;
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@ -229,9 +205,10 @@ namespace ChocolArm64.Memory
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{
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PTEntry Entry = GetPTEntry(Pos);
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return Entry.Type == BaseEntry.Type &&
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Entry.Map == BaseEntry.Map &&
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Entry.Perm == BaseEntry.Perm;
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return Entry.Map == BaseEntry.Map &&
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Entry.Perm == BaseEntry.Perm &&
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Entry.Type == BaseEntry.Type &&
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Entry.Attr == BaseEntry.Attr;
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}
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long Start = Position;
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@ -249,7 +226,12 @@ namespace ChocolArm64.Memory
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long Size = End - Start;
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return new AMemoryMapInfo(Start, Size, BaseEntry.Type, BaseEntry.Perm);
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return new AMemoryMapInfo(
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Start,
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Size,
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BaseEntry.Type,
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BaseEntry.Attr,
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BaseEntry.Perm);
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}
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public bool HasPermission(long Position, AMemoryPerm Perm)
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@ -257,7 +239,6 @@ namespace ChocolArm64.Memory
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return GetPTEntry(Position).Perm.HasFlag(Perm);
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public bool IsMapped(long Position)
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{
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if (Position >> PTLvl0Bits + PTLvl1Bits + PTPageBits != 0)
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@ -276,7 +257,6 @@ namespace ChocolArm64.Memory
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return PageTable[L0][L1].Map != PTMap.Unmapped;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private PTEntry GetPTEntry(long Position)
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{
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long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
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@ -290,7 +270,6 @@ namespace ChocolArm64.Memory
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return PageTable[L0][L1];
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private void SetPTEntry(long Position, PTEntry Entry)
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{
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long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
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@ -1,5 +1,3 @@
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using System.Runtime.CompilerServices;
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namespace Ryujinx.Gpu
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{
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class NsGpuMemoryMgr
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@ -107,6 +105,11 @@ namespace Ryujinx.Gpu
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long Position = 0;
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long FreeSize = 0;
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if (Align < 1)
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{
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Align = 1;
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}
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Align = (Align + PageMask) & ~PageMask;
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while (Position + FreeSize < AddrSize)
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@ -149,7 +152,6 @@ namespace Ryujinx.Gpu
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return BasePos + (Position & PageMask);
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool HasPTAddr(long Position)
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{
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if (Position >> PTLvl0Bits + PTLvl1Bits + PTPageBits != 0)
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@ -168,7 +170,6 @@ namespace Ryujinx.Gpu
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return PageTable[L0][L1] != PteUnmapped;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private long GetPTAddr(long Position)
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{
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long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
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@ -182,7 +183,6 @@ namespace Ryujinx.Gpu
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return PageTable[L0][L1];
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private void SetPTAddr(long Position, long TgtAddr)
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{
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long L0 = (Position >> PTLvl0Bit) & PTLvl0Mask;
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@ -18,7 +18,7 @@ namespace Ryujinx.OsHle
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BaseAddress = MapInfo.Position;
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Size = MapInfo.Size;
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MemType = MapInfo.Type;
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MemAttr = 0;
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MemAttr = MapInfo.Attr;
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MemPerm = (int)MapInfo.Perm;
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IpcRefCount = 0;
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DeviceRefCount = 0;
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@ -8,7 +8,7 @@ namespace Ryujinx.OsHle.Svc
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{
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private static void SvcSetHeapSize(Switch Ns, ARegisters Registers, AMemory Memory)
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{
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int Size = (int)Registers.X1;
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uint Size = (uint)Registers.X1;
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Memory.Manager.SetHeapSize(Size, (int)MemoryType.Heap);
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@ -30,8 +30,8 @@ namespace Ryujinx.OsHle.Svc
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private static void SvcMapMemory(Switch Ns, ARegisters Registers, AMemory Memory)
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{
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long Src = (long)Registers.X0;
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long Dst = (long)Registers.X1;
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long Dst = (long)Registers.X0;
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long Src = (long)Registers.X1;
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long Size = (long)Registers.X2;
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Memory.Manager.MapMirror(Src, Dst, Size, (int)MemoryType.MappedMemory);
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@ -79,12 +79,10 @@ namespace Ryujinx.OsHle.Svc
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HndData.VirtPos = Src;
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if (Memory.Manager.MapPhys(Src, Dst, Size,
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(int)MemoryType.SharedMemory, (AMemoryPerm)Perm))
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{
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Memory.Manager.MapPhys(Position, Size, (int)MemoryType.SharedMemory, (AMemoryPerm)Perm);
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Registers.X0 = (int)SvcResult.Success;
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}
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}
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//TODO: Error codes.
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}
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