ryujinx-mirror/Ryujinx/Cpu/Decoder/AOpCodeSimdTbl.cs

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2018-02-04 23:08:20 +00:00
using ChocolArm64.Instruction;
namespace ChocolArm64.Decoder
{
class AOpCodeSimdTbl : AOpCodeSimdReg
{
public AOpCodeSimdTbl(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
{
Size = ((OpCode >> 13) & 3) + 1;
}
}
}