ryujinx-mirror/Ryujinx.Tests/Cpu/PrecomputedThumbTestCase.cs

namespace Ryujinx.Tests.Cpu
{
    public class PrecomputedThumbTestCase
    {
        public ushort[] Instructions;
        public uint[] StartRegs;
        public uint[] FinalRegs;
    }
}
-												T32: Implement ALU (shifted register) instructions (#3135)

* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register)

* OpCodeTable: Sort T32 list

* Tests: Rename RandomTestCase to PrecomputedThumbTestCase

* T32: Tests for AluRsImm instructions

* fix nit

* fix nit 2
											
										
										
											2022-02-22 22:11:28 +00:00
+								namespace Ryujinx.Tests.Cpu
 								{
 								    public class PrecomputedThumbTestCase
 								    {
 								        public ushort[] Instructions;
 								        public uint[] StartRegs;
 								        public uint[] FinalRegs;
 								    }
 								}