362 lines
12 KiB
ArmAsm
Executable file
362 lines
12 KiB
ArmAsm
Executable file
/*
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* ARM NEON IDCT
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*
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* Copyright (c) 2008 Mans Rullgard <mans@mansr.com>
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* Copyright (c) 2017 Matthieu Bouron <matthieu.bouron@gmail.com>
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*
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* Based on Simple IDCT
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* Copyright (c) 2001 Michael Niedermayer <michaelni@gmx.at>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/aarch64/asm.S"
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#define Z1 22725 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z2 21407 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z3 19266 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z4 16383 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z5 12873 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z6 8867 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z7 4520 //cos(i*M_PI/16)*sqrt(2)*(1<<14) + 0.5
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#define Z4c ((1<<(COL_SHIFT-1))/Z4)
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#define ROW_SHIFT 11
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#define COL_SHIFT 20
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#define z1 v0.H[0]
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#define z2 v0.H[1]
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#define z3 v0.H[2]
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#define z4 v0.H[3]
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#define z5 v0.H[4]
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#define z6 v0.H[5]
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#define z7 v0.H[6]
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#define z4c v0.H[7]
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const idct_coeff_neon, align=4
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.short Z1, Z2, Z3, Z4, Z5, Z6, Z7, Z4c
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endconst
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.macro idct_start data
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prfm pldl1keep, [\data]
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mov x10, x30
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movrel x3, idct_coeff_neon
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ld1 {v0.2D}, [x3]
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.endm
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.macro idct_end
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br x10
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.endm
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.macro smull1 a, b, c
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smull \a, \b, \c
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.endm
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.macro smlal1 a, b, c
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smlal \a, \b, \c
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.endm
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.macro smlsl1 a, b, c
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smlsl \a, \b, \c
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.endm
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.macro idct_col4_top y1, y2, y3, y4, i, l
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smull\i v7.4S, \y3\l, z2
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smull\i v16.4S, \y3\l, z6
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smull\i v17.4S, \y2\l, z1
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add v19.4S, v23.4S, v7.4S
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smull\i v18.4S, \y2\l, z3
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add v20.4S, v23.4S, v16.4S
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smull\i v5.4S, \y2\l, z5
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sub v21.4S, v23.4S, v16.4S
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smull\i v6.4S, \y2\l, z7
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sub v22.4S, v23.4S, v7.4S
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smlal\i v17.4S, \y4\l, z3
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smlsl\i v18.4S, \y4\l, z7
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smlsl\i v5.4S, \y4\l, z1
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smlsl\i v6.4S, \y4\l, z5
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.endm
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.macro idct_row4_neon y1, y2, y3, y4, pass
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ld1 {\y1\().2D,\y2\().2D}, [x2], #32
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movi v23.4S, #1<<2, lsl #8
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orr v5.16B, \y1\().16B, \y2\().16B
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ld1 {\y3\().2D,\y4\().2D}, [x2], #32
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orr v6.16B, \y3\().16B, \y4\().16B
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orr v5.16B, v5.16B, v6.16B
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mov x3, v5.D[1]
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smlal v23.4S, \y1\().4H, z4
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idct_col4_top \y1, \y2, \y3, \y4, 1, .4H
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cmp x3, #0
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b.eq \pass\()f
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smull2 v7.4S, \y1\().8H, z4
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smlal2 v17.4S, \y2\().8H, z5
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smlsl2 v18.4S, \y2\().8H, z1
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smull2 v16.4S, \y3\().8H, z2
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smlal2 v5.4S, \y2\().8H, z7
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add v19.4S, v19.4S, v7.4S
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sub v20.4S, v20.4S, v7.4S
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sub v21.4S, v21.4S, v7.4S
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add v22.4S, v22.4S, v7.4S
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smlal2 v6.4S, \y2\().8H, z3
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smull2 v7.4S, \y3\().8H, z6
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smlal2 v17.4S, \y4\().8H, z7
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smlsl2 v18.4S, \y4\().8H, z5
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smlal2 v5.4S, \y4\().8H, z3
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smlsl2 v6.4S, \y4\().8H, z1
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add v19.4S, v19.4S, v7.4S
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sub v20.4S, v20.4S, v16.4S
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add v21.4S, v21.4S, v16.4S
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sub v22.4S, v22.4S, v7.4S
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\pass: add \y3\().4S, v19.4S, v17.4S
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add \y4\().4S, v20.4S, v18.4S
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shrn \y1\().4H, \y3\().4S, #ROW_SHIFT
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shrn \y2\().4H, \y4\().4S, #ROW_SHIFT
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add v7.4S, v21.4S, v5.4S
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add v16.4S, v22.4S, v6.4S
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shrn \y3\().4H, v7.4S, #ROW_SHIFT
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shrn \y4\().4H, v16.4S, #ROW_SHIFT
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sub v22.4S, v22.4S, v6.4S
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sub v19.4S, v19.4S, v17.4S
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sub v21.4S, v21.4S, v5.4S
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shrn2 \y1\().8H, v22.4S, #ROW_SHIFT
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sub v20.4S, v20.4S, v18.4S
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shrn2 \y2\().8H, v21.4S, #ROW_SHIFT
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shrn2 \y3\().8H, v20.4S, #ROW_SHIFT
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shrn2 \y4\().8H, v19.4S, #ROW_SHIFT
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trn1 v16.8H, \y1\().8H, \y2\().8H
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trn2 v17.8H, \y1\().8H, \y2\().8H
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trn1 v18.8H, \y3\().8H, \y4\().8H
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trn2 v19.8H, \y3\().8H, \y4\().8H
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trn1 \y1\().4S, v16.4S, v18.4S
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trn1 \y2\().4S, v17.4S, v19.4S
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trn2 \y3\().4S, v16.4S, v18.4S
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trn2 \y4\().4S, v17.4S, v19.4S
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.endm
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.macro declare_idct_col4_neon i, l
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function idct_col4_neon\i
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dup v23.4H, z4c
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.if \i == 1
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add v23.4H, v23.4H, v24.4H
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.else
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mov v5.D[0], v24.D[1]
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add v23.4H, v23.4H, v5.4H
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.endif
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smull v23.4S, v23.4H, z4
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idct_col4_top v24, v25, v26, v27, \i, \l
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mov x4, v28.D[\i - 1]
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mov x5, v29.D[\i - 1]
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cmp x4, #0
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b.eq 1f
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smull\i v7.4S, v28\l, z4
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add v19.4S, v19.4S, v7.4S
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sub v20.4S, v20.4S, v7.4S
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sub v21.4S, v21.4S, v7.4S
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add v22.4S, v22.4S, v7.4S
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1: mov x4, v30.D[\i - 1]
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cmp x5, #0
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b.eq 2f
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smlal\i v17.4S, v29\l, z5
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smlsl\i v18.4S, v29\l, z1
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smlal\i v5.4S, v29\l, z7
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smlal\i v6.4S, v29\l, z3
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2: mov x5, v31.D[\i - 1]
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cmp x4, #0
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b.eq 3f
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smull\i v7.4S, v30\l, z6
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smull\i v16.4S, v30\l, z2
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add v19.4S, v19.4S, v7.4S
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sub v22.4S, v22.4S, v7.4S
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sub v20.4S, v20.4S, v16.4S
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add v21.4S, v21.4S, v16.4S
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3: cmp x5, #0
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b.eq 4f
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smlal\i v17.4S, v31\l, z7
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smlsl\i v18.4S, v31\l, z5
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smlal\i v5.4S, v31\l, z3
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smlsl\i v6.4S, v31\l, z1
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4: addhn v7.4H, v19.4S, v17.4S
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addhn2 v7.8H, v20.4S, v18.4S
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subhn v18.4H, v20.4S, v18.4S
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subhn2 v18.8H, v19.4S, v17.4S
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addhn v16.4H, v21.4S, v5.4S
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addhn2 v16.8H, v22.4S, v6.4S
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subhn v17.4H, v22.4S, v6.4S
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subhn2 v17.8H, v21.4S, v5.4S
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ret
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endfunc
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.endm
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declare_idct_col4_neon 1, .4H
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declare_idct_col4_neon 2, .8H
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function ff_simple_idct_put_neon, export=1
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idct_start x2
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idct_row4_neon v24, v25, v26, v27, 1
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idct_row4_neon v28, v29, v30, v31, 2
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bl idct_col4_neon1
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sqshrun v1.8B, v7.8H, #COL_SHIFT-16
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sqshrun2 v1.16B, v16.8H, #COL_SHIFT-16
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sqshrun v3.8B, v17.8H, #COL_SHIFT-16
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sqshrun2 v3.16B, v18.8H, #COL_SHIFT-16
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bl idct_col4_neon2
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sqshrun v2.8B, v7.8H, #COL_SHIFT-16
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sqshrun2 v2.16B, v16.8H, #COL_SHIFT-16
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sqshrun v4.8B, v17.8H, #COL_SHIFT-16
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sqshrun2 v4.16B, v18.8H, #COL_SHIFT-16
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zip1 v16.4S, v1.4S, v2.4S
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zip2 v17.4S, v1.4S, v2.4S
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st1 {v16.D}[0], [x0], x1
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st1 {v16.D}[1], [x0], x1
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zip1 v18.4S, v3.4S, v4.4S
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zip2 v19.4S, v3.4S, v4.4S
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st1 {v17.D}[0], [x0], x1
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st1 {v17.D}[1], [x0], x1
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st1 {v18.D}[0], [x0], x1
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st1 {v18.D}[1], [x0], x1
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st1 {v19.D}[0], [x0], x1
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st1 {v19.D}[1], [x0], x1
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idct_end
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endfunc
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function ff_simple_idct_add_neon, export=1
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idct_start x2
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idct_row4_neon v24, v25, v26, v27, 1
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idct_row4_neon v28, v29, v30, v31, 2
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bl idct_col4_neon1
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sshr v1.8H, v7.8H, #COL_SHIFT-16
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sshr v2.8H, v16.8H, #COL_SHIFT-16
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sshr v3.8H, v17.8H, #COL_SHIFT-16
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sshr v4.8H, v18.8H, #COL_SHIFT-16
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bl idct_col4_neon2
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sshr v7.8H, v7.8H, #COL_SHIFT-16
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sshr v16.8H, v16.8H, #COL_SHIFT-16
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sshr v17.8H, v17.8H, #COL_SHIFT-16
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sshr v18.8H, v18.8H, #COL_SHIFT-16
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mov x9, x0
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ld1 {v19.D}[0], [x0], x1
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zip1 v23.2D, v1.2D, v7.2D
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zip2 v24.2D, v1.2D, v7.2D
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ld1 {v19.D}[1], [x0], x1
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zip1 v25.2D, v2.2D, v16.2D
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zip2 v26.2D, v2.2D, v16.2D
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ld1 {v20.D}[0], [x0], x1
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zip1 v27.2D, v3.2D, v17.2D
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zip2 v28.2D, v3.2D, v17.2D
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ld1 {v20.D}[1], [x0], x1
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zip1 v29.2D, v4.2D, v18.2D
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zip2 v30.2D, v4.2D, v18.2D
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ld1 {v21.D}[0], [x0], x1
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uaddw v23.8H, v23.8H, v19.8B
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uaddw2 v24.8H, v24.8H, v19.16B
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ld1 {v21.D}[1], [x0], x1
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sqxtun v23.8B, v23.8H
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sqxtun2 v23.16B, v24.8H
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ld1 {v22.D}[0], [x0], x1
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uaddw v24.8H, v25.8H, v20.8B
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uaddw2 v25.8H, v26.8H, v20.16B
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ld1 {v22.D}[1], [x0], x1
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sqxtun v24.8B, v24.8H
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sqxtun2 v24.16B, v25.8H
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st1 {v23.D}[0], [x9], x1
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uaddw v25.8H, v27.8H, v21.8B
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uaddw2 v26.8H, v28.8H, v21.16B
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st1 {v23.D}[1], [x9], x1
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sqxtun v25.8B, v25.8H
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sqxtun2 v25.16B, v26.8H
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st1 {v24.D}[0], [x9], x1
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uaddw v26.8H, v29.8H, v22.8B
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uaddw2 v27.8H, v30.8H, v22.16B
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st1 {v24.D}[1], [x9], x1
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sqxtun v26.8B, v26.8H
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sqxtun2 v26.16B, v27.8H
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st1 {v25.D}[0], [x9], x1
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st1 {v25.D}[1], [x9], x1
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st1 {v26.D}[0], [x9], x1
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st1 {v26.D}[1], [x9], x1
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idct_end
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endfunc
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function ff_simple_idct_neon, export=1
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idct_start x0
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mov x2, x0
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idct_row4_neon v24, v25, v26, v27, 1
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idct_row4_neon v28, v29, v30, v31, 2
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sub x2, x2, #128
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bl idct_col4_neon1
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sshr v1.8H, v7.8H, #COL_SHIFT-16
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sshr v2.8H, v16.8H, #COL_SHIFT-16
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sshr v3.8H, v17.8H, #COL_SHIFT-16
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sshr v4.8H, v18.8H, #COL_SHIFT-16
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bl idct_col4_neon2
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sshr v7.8H, v7.8H, #COL_SHIFT-16
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sshr v16.8H, v16.8H, #COL_SHIFT-16
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sshr v17.8H, v17.8H, #COL_SHIFT-16
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sshr v18.8H, v18.8H, #COL_SHIFT-16
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zip1 v23.2D, v1.2D, v7.2D
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zip2 v24.2D, v1.2D, v7.2D
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st1 {v23.2D,v24.2D}, [x2], #32
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zip1 v25.2D, v2.2D, v16.2D
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zip2 v26.2D, v2.2D, v16.2D
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st1 {v25.2D,v26.2D}, [x2], #32
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zip1 v27.2D, v3.2D, v17.2D
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zip2 v28.2D, v3.2D, v17.2D
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st1 {v27.2D,v28.2D}, [x2], #32
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zip1 v29.2D, v4.2D, v18.2D
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zip2 v30.2D, v4.2D, v18.2D
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st1 {v29.2D,v30.2D}, [x2], #32
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idct_end
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endfunc
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