675 lines
26 KiB
C++
Executable file
675 lines
26 KiB
C++
Executable file
// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "shader_recompiler/backend/glasm/emit_glasm_instructions.h"
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#include "shader_recompiler/backend/glasm/glasm_emit_context.h"
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#include "shader_recompiler/frontend/ir/program.h"
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#include "shader_recompiler/frontend/ir/value.h"
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#include "shader_recompiler/profile.h"
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#include "shader_recompiler/runtime_info.h"
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namespace Shader::Backend::GLASM {
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namespace {
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void StorageOp(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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std::string_view then_expr, std::string_view else_expr = {}) {
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// Operate on bindless SSBO, call the expression with bounds checking
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// address = c[binding].xy
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// length = c[binding].z
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const u32 sb_binding{binding.U32()};
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ctx.Add("PK64.U DC,c[{}];" // pointer = address
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"CVT.U64.U32 DC.z,{};" // offset = uint64_t(offset)
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"ADD.U64 DC.x,DC.x,DC.z;" // pointer += offset
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"SLT.U.CC RC.x,{},c[{}].z;", // cc = offset < length
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sb_binding, offset, offset, sb_binding);
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if (else_expr.empty()) {
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ctx.Add("IF NE.x;{}ENDIF;", then_expr);
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} else {
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ctx.Add("IF NE.x;{}ELSE;{}ENDIF;", then_expr, else_expr);
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}
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}
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void GlobalStorageOp(EmitContext& ctx, Register address, bool pointer_based, std::string_view expr,
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std::string_view else_expr = {}) {
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const size_t num_buffers{ctx.info.storage_buffers_descriptors.size()};
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for (size_t index = 0; index < num_buffers; ++index) {
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if (!ctx.info.nvn_buffer_used[index]) {
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continue;
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}
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const auto& ssbo{ctx.info.storage_buffers_descriptors[index]};
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const u64 ssbo_align_mask{~(ctx.profile.min_ssbo_alignment - 1U)};
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ctx.Add("LDC.U64 DC.x,c{}[{}];" // unaligned_ssbo_addr
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"AND.U64 DC.x,DC.x,{};" // ssbo_addr = unaligned_ssbo_addr & ssbo_align_mask
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"LDC.U32 RC.x,c{}[{}];" // ssbo_size_u32
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"CVT.U64.U32 DC.y,RC.x;" // ssbo_size = ssbo_size_u32
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"ADD.U64 DC.y,DC.y,DC.x;" // ssbo_end = ssbo_addr + ssbo_size
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"SGE.U64 RC.x,{}.x,DC.x;" // a = input_addr >= ssbo_addr ? -1 : 0
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"SLT.U64 RC.y,{}.x,DC.y;" // b = input_addr < ssbo_end ? -1 : 0
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"AND.U.CC RC.x,RC.x,RC.y;" // cond = a && b
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"IF NE.x;" // if cond
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"SUB.U64 DC.x,{}.x,DC.x;", // offset = input_addr - ssbo_addr
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ssbo.cbuf_index, ssbo.cbuf_offset, ssbo_align_mask, ssbo.cbuf_index,
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ssbo.cbuf_offset + 8, address, address, address);
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if (pointer_based) {
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ctx.Add("PK64.U DC.y,c[{}];" // host_ssbo = cbuf
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"ADD.U64 DC.x,DC.x,DC.y;" // host_addr = host_ssbo + offset
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"{}"
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"ELSE;",
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index, expr);
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} else {
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ctx.Add("CVT.U32.U64 RC.x,DC.x;"
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"{},ssbo{}[RC.x];"
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"ELSE;",
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expr, index);
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}
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}
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if (!else_expr.empty()) {
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ctx.Add("{}", else_expr);
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}
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const size_t num_used_buffers{ctx.info.nvn_buffer_used.count()};
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for (size_t index = 0; index < num_used_buffers; ++index) {
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ctx.Add("ENDIF;");
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}
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}
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template <typename ValueType>
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void Write(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset, ValueType value,
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std::string_view size) {
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if (ctx.runtime_info.glasm_use_storage_buffers) {
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ctx.Add("STB.{} {},ssbo{}[{}];", size, value, binding.U32(), offset);
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} else {
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StorageOp(ctx, binding, offset, fmt::format("STORE.{} {},DC.x;", size, value));
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}
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}
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void Load(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset,
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std::string_view size) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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if (ctx.runtime_info.glasm_use_storage_buffers) {
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ctx.Add("LDB.{} {},ssbo{}[{}];", size, ret, binding.U32(), offset);
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} else {
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StorageOp(ctx, binding, offset, fmt::format("LOAD.{} {},DC.x;", size, ret),
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fmt::format("MOV.U {},{{0,0,0,0}};", ret));
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}
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}
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template <typename ValueType>
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void GlobalWrite(EmitContext& ctx, Register address, ValueType value, std::string_view size) {
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if (ctx.runtime_info.glasm_use_storage_buffers) {
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GlobalStorageOp(ctx, address, false, fmt::format("STB.{} {}", size, value));
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} else {
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GlobalStorageOp(ctx, address, true, fmt::format("STORE.{} {},DC.x;", size, value));
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}
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}
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void GlobalLoad(EmitContext& ctx, IR::Inst& inst, Register address, std::string_view size) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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if (ctx.runtime_info.glasm_use_storage_buffers) {
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GlobalStorageOp(ctx, address, false, fmt::format("LDB.{} {}", size, ret));
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} else {
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GlobalStorageOp(ctx, address, true, fmt::format("LOAD.{} {},DC.x;", size, ret),
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fmt::format("MOV.S {},0;", ret));
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}
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}
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template <typename ValueType>
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void Atom(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding, ScalarU32 offset,
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ValueType value, std::string_view operation, std::string_view size) {
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const Register ret{ctx.reg_alloc.Define(inst)};
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if (ctx.runtime_info.glasm_use_storage_buffers) {
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ctx.Add("ATOMB.{}.{} {},{},ssbo{}[{}];", operation, size, ret, value, binding.U32(),
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offset);
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} else {
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StorageOp(ctx, binding, offset,
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fmt::format("ATOM.{}.{} {},{},DC.x;", operation, size, ret, value));
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}
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}
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} // Anonymous namespace
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void EmitLoadGlobalU8(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "U8");
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}
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void EmitLoadGlobalS8(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "S8");
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}
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void EmitLoadGlobalU16(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "U16");
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}
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void EmitLoadGlobalS16(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "S16");
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}
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void EmitLoadGlobal32(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "U32");
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}
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void EmitLoadGlobal64(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "U32X2");
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}
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void EmitLoadGlobal128(EmitContext& ctx, IR::Inst& inst, Register address) {
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GlobalLoad(ctx, inst, address, "U32X4");
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}
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void EmitWriteGlobalU8(EmitContext& ctx, Register address, Register value) {
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GlobalWrite(ctx, address, value, "U8");
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}
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void EmitWriteGlobalS8(EmitContext& ctx, Register address, Register value) {
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GlobalWrite(ctx, address, value, "S8");
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}
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void EmitWriteGlobalU16(EmitContext& ctx, Register address, Register value) {
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GlobalWrite(ctx, address, value, "U16");
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}
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void EmitWriteGlobalS16(EmitContext& ctx, Register address, Register value) {
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GlobalWrite(ctx, address, value, "S16");
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}
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void EmitWriteGlobal32(EmitContext& ctx, Register address, ScalarU32 value) {
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GlobalWrite(ctx, address, value, "U32");
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}
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void EmitWriteGlobal64(EmitContext& ctx, Register address, Register value) {
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GlobalWrite(ctx, address, value, "U32X2");
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}
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void EmitWriteGlobal128(EmitContext& ctx, Register address, Register value) {
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GlobalWrite(ctx, address, value, "U32X4");
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}
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void EmitLoadStorageU8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "U8");
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}
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void EmitLoadStorageS8(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "S8");
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}
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void EmitLoadStorageU16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "U16");
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}
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void EmitLoadStorageS16(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "S16");
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}
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void EmitLoadStorage32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "U32");
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}
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void EmitLoadStorage64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "U32X2");
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}
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void EmitLoadStorage128(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset) {
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Load(ctx, inst, binding, offset, "U32X4");
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}
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void EmitWriteStorageU8(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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ScalarU32 value) {
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Write(ctx, binding, offset, value, "U8");
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}
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void EmitWriteStorageS8(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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ScalarS32 value) {
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Write(ctx, binding, offset, value, "S8");
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}
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void EmitWriteStorageU16(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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ScalarU32 value) {
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Write(ctx, binding, offset, value, "U16");
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}
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void EmitWriteStorageS16(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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ScalarS32 value) {
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Write(ctx, binding, offset, value, "S16");
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}
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void EmitWriteStorage32(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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ScalarU32 value) {
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Write(ctx, binding, offset, value, "U32");
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}
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void EmitWriteStorage64(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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Register value) {
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Write(ctx, binding, offset, value, "U32X2");
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}
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void EmitWriteStorage128(EmitContext& ctx, const IR::Value& binding, ScalarU32 offset,
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Register value) {
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Write(ctx, binding, offset, value, "U32X4");
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}
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void EmitSharedAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.ADD.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicSMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarS32 value) {
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ctx.Add("ATOMS.MIN.S32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicUMin32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.MIN.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicSMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarS32 value) {
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ctx.Add("ATOMS.MAX.S32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicUMax32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.MAX.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicInc32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.IWRAP.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicDec32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.DWRAP.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicAnd32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.AND.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicOr32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.OR.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicXor32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.XOR.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicExchange32(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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ScalarU32 value) {
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ctx.Add("ATOMS.EXCH.U32 {},{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicExchange64(EmitContext& ctx, IR::Inst& inst, ScalarU32 pointer_offset,
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Register value) {
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ctx.LongAdd("ATOMS.EXCH.U64 {}.x,{},shared_mem[{}];", inst, value, pointer_offset);
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}
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void EmitSharedAtomicExchange32x2([[maybe_unused]] EmitContext& ctx,
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[[maybe_unused]] IR::Inst& inst,
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[[maybe_unused]] ScalarU32 pointer_offset,
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[[maybe_unused]] Register value) {
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throw NotImplementedException("GLASM instruction");
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}
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void EmitStorageAtomicIAdd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "ADD", "U32");
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}
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void EmitStorageAtomicSMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarS32 value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "S32");
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}
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void EmitStorageAtomicUMin32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "U32");
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}
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void EmitStorageAtomicSMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarS32 value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "S32");
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}
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void EmitStorageAtomicUMax32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "U32");
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}
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void EmitStorageAtomicInc32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "IWRAP", "U32");
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}
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void EmitStorageAtomicDec32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "DWRAP", "U32");
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}
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void EmitStorageAtomicAnd32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "AND", "U32");
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}
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void EmitStorageAtomicOr32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "OR", "U32");
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}
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void EmitStorageAtomicXor32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "XOR", "U32");
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}
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void EmitStorageAtomicExchange32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, ScalarU32 value) {
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Atom(ctx, inst, binding, offset, value, "EXCH", "U32");
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}
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void EmitStorageAtomicIAdd64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "ADD", "U64");
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}
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void EmitStorageAtomicSMin64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "S64");
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}
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void EmitStorageAtomicUMin64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MIN", "U64");
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}
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void EmitStorageAtomicSMax64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "S64");
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}
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void EmitStorageAtomicUMax64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "MAX", "U64");
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}
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void EmitStorageAtomicAnd64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "AND", "U64");
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}
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void EmitStorageAtomicOr64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "OR", "U64");
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}
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void EmitStorageAtomicXor64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
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ScalarU32 offset, Register value) {
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Atom(ctx, inst, binding, offset, value, "XOR", "U64");
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}
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void EmitStorageAtomicExchange64(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
|
|
ScalarU32 offset, Register value) {
|
|
Atom(ctx, inst, binding, offset, value, "EXCH", "U64");
|
|
}
|
|
|
|
void EmitStorageAtomicIAdd32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicSMin32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicUMin32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicSMax32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicUMax32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicAnd32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicOr32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicXor32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicExchange32x2([[maybe_unused]] EmitContext& ctx,
|
|
[[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset,
|
|
[[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicAddF32(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
|
|
ScalarU32 offset, ScalarF32 value) {
|
|
Atom(ctx, inst, binding, offset, value, "ADD", "F32");
|
|
}
|
|
|
|
void EmitStorageAtomicAddF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
|
|
ScalarU32 offset, Register value) {
|
|
Atom(ctx, inst, binding, offset, value, "ADD", "F16x2");
|
|
}
|
|
|
|
void EmitStorageAtomicAddF32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicMinF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
|
|
ScalarU32 offset, Register value) {
|
|
Atom(ctx, inst, binding, offset, value, "MIN", "F16x2");
|
|
}
|
|
|
|
void EmitStorageAtomicMinF32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitStorageAtomicMaxF16x2(EmitContext& ctx, IR::Inst& inst, const IR::Value& binding,
|
|
ScalarU32 offset, Register value) {
|
|
Atom(ctx, inst, binding, offset, value, "MAX", "F16x2");
|
|
}
|
|
|
|
void EmitStorageAtomicMaxF32x2([[maybe_unused]] EmitContext& ctx, [[maybe_unused]] IR::Inst& inst,
|
|
[[maybe_unused]] const IR::Value& binding,
|
|
[[maybe_unused]] ScalarU32 offset, [[maybe_unused]] Register value) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicIAdd32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicSMin32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicUMin32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicSMax32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicUMax32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicInc32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicDec32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicAnd32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicOr32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicXor32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicExchange32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicIAdd64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicSMin64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicUMin64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicSMax64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicUMax64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicInc64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicDec64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicAnd64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicOr64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicXor64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicExchange64(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicIAdd32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicSMin32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicUMin32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicSMax32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicUMax32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicInc32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicDec32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicAnd32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicOr32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicXor32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicExchange32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicAddF32(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicAddF16x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicAddF32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicMinF16x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicMinF32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicMaxF16x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
void EmitGlobalAtomicMaxF32x2(EmitContext&) {
|
|
throw NotImplementedException("GLASM instruction");
|
|
}
|
|
|
|
} // namespace Shader::Backend::GLASM
|