mirror of
https://github.com/tildearrow/furnace.git
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201 lines
4.8 KiB
C
201 lines
4.8 KiB
C
/*
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* Copyright (C) 2019 Nuke.YKT
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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* Yamaha YM2413 emulator
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* Thanks:
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* siliconpr0n.org(digshadow, John McMaster):
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* VRC VII decap and die shot.
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*
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* version: 1.0.1
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*/
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#ifndef OPLL_H
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#define OPLL_H
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#include <stdint.h>
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enum {
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opll_type_ym2413 = 0x00, /* Yamaha YM2413 */
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opll_type_ds1001, /* Konami VRC VII */
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opll_type_ym2413b, /* Yamaha YM2413B */
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opll_type_ymf281, /* Yamaha YMF281 */
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opll_type_ymf281b, /* Yamaha YMF281B */
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opll_type_ym2420, /* Yamaha YM2420 */
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opll_type_ym2423, /* Yamaha YM2423 */
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};
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enum {
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opll_patch_1 = 0x00,
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opll_patch_2,
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opll_patch_3,
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opll_patch_4,
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opll_patch_5,
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opll_patch_6,
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opll_patch_7,
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opll_patch_8,
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opll_patch_9,
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opll_patch_10,
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opll_patch_11,
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opll_patch_12,
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opll_patch_13,
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opll_patch_14,
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opll_patch_15,
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opll_patch_drum_0,
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opll_patch_drum_1,
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opll_patch_drum_2,
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opll_patch_drum_3,
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opll_patch_drum_4,
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opll_patch_drum_5,
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opll_patch_max
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};
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typedef struct {
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uint8_t tl;
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uint8_t dc;
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uint8_t dm;
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uint8_t fb;
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uint8_t am[2];
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uint8_t vib[2];
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uint8_t et[2];
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uint8_t ksr[2];
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uint8_t multi[2];
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uint8_t ksl[2];
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uint8_t ar[2];
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uint8_t dr[2];
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uint8_t sl[2];
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uint8_t rr[2];
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} opll_patch_t;
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typedef struct {
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uint32_t chip_type;
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uint32_t cycles;
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uint32_t slot;
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const opll_patch_t *patchrom;
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/* IO */
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uint8_t write_data;
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uint8_t write_a;
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uint8_t write_d;
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uint8_t write_a_en;
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uint8_t write_d_en;
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uint8_t write_fm_address;
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uint8_t write_fm_data;
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uint8_t write_mode_address;
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uint8_t address;
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uint8_t data;
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/* Envelope generator */
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uint8_t eg_counter_state;
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uint8_t eg_counter_state_prev;
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uint32_t eg_timer;
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uint8_t eg_timer_low_lock;
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uint8_t eg_timer_carry;
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uint8_t eg_timer_shift;
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uint8_t eg_timer_shift_lock;
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uint8_t eg_timer_shift_stop;
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uint8_t eg_state[18];
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uint8_t eg_level[18];
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uint8_t eg_kon;
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uint32_t eg_dokon;
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uint8_t eg_off;
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uint8_t eg_rate;
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uint8_t eg_maxrate;
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uint8_t eg_zerorate;
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uint8_t eg_inc_lo;
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uint8_t eg_inc_hi;
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uint8_t eg_rate_hi;
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uint16_t eg_sl;
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uint16_t eg_ksltl;
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uint8_t eg_out;
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uint8_t eg_silent;
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/* Phase generator */
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uint16_t pg_fnum;
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uint8_t pg_block;
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uint16_t pg_out;
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uint32_t pg_inc;
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uint32_t pg_phase[18];
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uint32_t pg_phase_next;
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/* Operator */
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int16_t op_fb1[9];
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int16_t op_fb2[9];
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int16_t op_fbsum;
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int16_t op_mod;
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uint8_t op_neg;
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uint16_t op_logsin;
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uint16_t op_exp_m;
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uint16_t op_exp_s;
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/* Channel */
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int16_t ch_out;
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int16_t ch_out_hh;
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int16_t ch_out_tm;
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int16_t ch_out_bd;
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int16_t ch_out_sd;
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int16_t ch_out_tc;
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/* LFO */
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uint16_t lfo_counter;
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uint8_t lfo_vib_counter;
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uint16_t lfo_am_counter;
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uint8_t lfo_am_step;
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uint8_t lfo_am_dir;
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uint8_t lfo_am_car;
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uint8_t lfo_am_out;
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/* Register set */
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uint16_t fnum[9];
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uint8_t block[9];
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uint8_t kon[9];
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uint8_t son[9];
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uint8_t vol[9];
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uint8_t inst[9];
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uint8_t rhythm;
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uint8_t testmode;
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opll_patch_t patch;
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uint8_t c_instr;
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uint8_t c_op;
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uint8_t c_tl;
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uint8_t c_dc;
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uint8_t c_dm;
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uint8_t c_fb;
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uint8_t c_am;
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uint8_t c_vib;
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uint8_t c_et;
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uint8_t c_ksr;
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uint8_t c_ksr_freq;
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uint8_t c_ksl_freq;
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uint8_t c_ksl_block;
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uint8_t c_multi;
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uint8_t c_ksl;
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uint8_t c_adrr[3];
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uint8_t c_sl;
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uint16_t c_fnum;
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uint16_t c_block;
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/* Rhythm mode */
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int8_t rm_enable;
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uint32_t rm_noise;
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uint32_t rm_select;
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uint8_t rm_hh_bit2;
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uint8_t rm_hh_bit3;
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uint8_t rm_hh_bit7;
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uint8_t rm_hh_bit8;
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uint8_t rm_tc_bit3;
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uint8_t rm_tc_bit5;
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int16_t output_m;
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int16_t output_r;
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} opll_t;
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const opll_patch_t* OPLL_GetPatchROM(uint32_t chip_type);
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void OPLL_Reset(opll_t *chip, uint32_t chip_type);
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void OPLL_Clock(opll_t *chip, int32_t *buffer);
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void OPLL_Write(opll_t *chip, uint32_t port, uint8_t data);
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#endif
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