mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-23 13:05:11 +00:00
54e93db207
not reliable yet
114 lines
4.1 KiB
C
114 lines
4.1 KiB
C
/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:46:00 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twidsq_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1fv_2 -include dft/simd/q1f.h */
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/*
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* This function contains 6 FP additions, 4 FP multiplications,
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* (or, 6 additions, 4 multiplications, 0 fused multiply/add),
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* 8 stack variables, 0 constants, and 8 memory accesses
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*/
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#include "dft/simd/q1f.h"
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static void q1fv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms)
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{
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{
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INT m;
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R *x;
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x = ri;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) {
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V T1, T2, T3, T4, T5, T6;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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T3 = BYTWJ(&(W[0]), VSUB(T1, T2));
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T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)]));
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T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
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T6 = BYTWJ(&(W[0]), VSUB(T4, T5));
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ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)]));
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ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
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ST(&(x[0]), VADD(T1, T2), ms, &(x[0]));
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ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)]));
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 2, XSIMD_STRING("q1fv_2"), twinstr, &GENUS, { 6, 4, 0, 0 }, 0, 0, 0 };
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void XSIMD(codelet_q1fv_2) (planner *p) {
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X(kdft_difsq_register) (p, q1fv_2, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twidsq_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 2 -dif -name q1fv_2 -include dft/simd/q1f.h */
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/*
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* This function contains 6 FP additions, 4 FP multiplications,
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* (or, 6 additions, 4 multiplications, 0 fused multiply/add),
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* 8 stack variables, 0 constants, and 8 memory accesses
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*/
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#include "dft/simd/q1f.h"
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static void q1fv_2(R *ri, R *ii, const R *W, stride rs, stride vs, INT mb, INT me, INT ms)
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{
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{
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INT m;
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R *x;
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x = ri;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 2)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 2), MAKE_VOLATILE_STRIDE(4, rs), MAKE_VOLATILE_STRIDE(4, vs)) {
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V T1, T2, T3, T4, T5, T6;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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T3 = BYTWJ(&(W[0]), VSUB(T1, T2));
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T4 = LD(&(x[WS(vs, 1)]), ms, &(x[WS(vs, 1)]));
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T5 = LD(&(x[WS(vs, 1) + WS(rs, 1)]), ms, &(x[WS(vs, 1) + WS(rs, 1)]));
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T6 = BYTWJ(&(W[0]), VSUB(T4, T5));
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ST(&(x[WS(vs, 1)]), T3, ms, &(x[WS(vs, 1)]));
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ST(&(x[WS(vs, 1) + WS(rs, 1)]), T6, ms, &(x[WS(vs, 1) + WS(rs, 1)]));
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ST(&(x[0]), VADD(T1, T2), ms, &(x[0]));
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ST(&(x[WS(rs, 1)]), VADD(T4, T5), ms, &(x[WS(rs, 1)]));
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 2, XSIMD_STRING("q1fv_2"), twinstr, &GENUS, { 6, 4, 0, 0 }, 0, 0, 0 };
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void XSIMD(codelet_q1fv_2) (planner *p) {
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X(kdft_difsq_register) (p, q1fv_2, &desc);
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}
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#endif
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