diff --git a/src/engine/dispatch.h b/src/engine/dispatch.h index fa57dda44..52e5c1c10 100644 --- a/src/engine/dispatch.h +++ b/src/engine/dispatch.h @@ -383,6 +383,8 @@ struct DivRegWrite { * - xx is the instance ID * - data is the sample position * - 0xffffffff: reset + * - 0xfffffffe: add delay + * - data is the delay */ unsigned int addr; unsigned int val; diff --git a/src/engine/platform/fmsharedbase.h b/src/engine/platform/fmsharedbase.h index ca5b52775..f8e0268dd 100644 --- a/src/engine/platform/fmsharedbase.h +++ b/src/engine/platform/fmsharedbase.h @@ -76,11 +76,11 @@ class DivPlatformFMBase: public DivDispatch { }; struct QueuedWrite { - unsigned short addr; + unsigned int addr; unsigned char val; bool addrOrVal; QueuedWrite(): addr(0), val(0), addrOrVal(false) {} - QueuedWrite(unsigned short a, unsigned char v): addr(a), val(v), addrOrVal(false) {} + QueuedWrite(unsigned int a, unsigned char v): addr(a), val(v), addrOrVal(false) {} }; FixedQueue writes; @@ -97,7 +97,7 @@ class DivPlatformFMBase: public DivDispatch { pendingWrites[a]=v; } } - inline void immWrite(unsigned short a, unsigned char v) { + inline void immWrite(unsigned int a, unsigned char v) { if (!skipRegisterWrites) { writes.push_back(QueuedWrite(a,v)); if (dumpWrites) { diff --git a/src/engine/platform/genesis.cpp b/src/engine/platform/genesis.cpp index 903d97a60..a2cfc7fbb 100644 --- a/src/engine/platform/genesis.cpp +++ b/src/engine/platform/genesis.cpp @@ -142,11 +142,16 @@ void DivPlatformGenesis::acquire_nuked(short** buf, size_t len) { for (size_t h=0; h0) delay--; + os[0]=0; os[1]=0; for (int i=0; i<6; i++) { - if (!writes.empty()) { + if (delay<=0 && !writes.empty()) { QueuedWrite& w=writes.front(); - if (w.addrOrVal) { + if (w.addr==0xfffffffe) { + delay=w.val*3; + writes.pop_front(); + } else if (w.addrOrVal) { //logV("%.3x=%.2x",w.addr,w.val); OPN2_Write(&fm,0x1+((w.addr>>8)<<1),w.val); regPool[w.addr&0x1ff]=w.val; @@ -223,13 +228,19 @@ void DivPlatformGenesis::acquire_ymfm(short** buf, size_t len) { for (size_t h=0; h0) delay--; os[0]=0; os[1]=0; - if (!writes.empty()) { + if (delay<=0 && !writes.empty()) { QueuedWrite& w=writes.front(); - fm_ymfm->write(0x0+((w.addr>>8)<<1),w.addr); - fm_ymfm->write(0x1+((w.addr>>8)<<1),w.val); - regPool[w.addr&0x1ff]=w.val; + if (w.addr==0xfffffffe) { + delay=w.val; + } else { + fm_ymfm->write(0x0+((w.addr>>8)<<1),w.addr); + fm_ymfm->write(0x1+((w.addr>>8)<<1),w.val); + regPool[w.addr&0x1ff]=w.val; + } writes.pop_front(); if (dacWrite>=0) { @@ -372,9 +383,14 @@ void DivPlatformGenesis::acquire_nuked276(short** buf, size_t len) { //lleCycle=0; - if (!writes.empty()) { + if (delay>0) delay--; + + if (delay<=0 && !writes.empty()) { QueuedWrite& w=writes.front(); - if (w.addrOrVal) { + if (w.addr==0xfffffffe) { + delay=w.val; + writes.pop_front(); + } else if (w.addrOrVal) { //logV("%.3x=%.2x",w.addr,w.val); //OPN2_Write(&fm,0x1+((w.addr>>8)<<1),w.val); was_reg_write=true; @@ -871,9 +887,7 @@ void DivPlatformGenesis::tick(bool sysTick) { // hard reset handling if (mustHardReset) { - for (unsigned int i=hardResetElapsed; i& writes=disCont[i].dispatch->getRegisterWrites(); for (DivRegWrite& j: writes) { - sortedWrites.push_back(std::pair(i,DivDelayedWrite(0,writeNum++,j.addr,j.val))); + if (j.addr==0xfffffffe) { // delay + curDelay+=(double)j.val*(44100.0/(double)disCont[i].dispatch->rate); + if (curDelay>totalWait) curDelay=totalWait-1; + } else { + sortedWrites.push_back(std::pair(i,DivDelayedWrite(curDelay,writeNum++,j.addr,j.val))); + } } writes.clear(); }