From 54934dcfc9639eeb48ff18c7f3fef86a10c6ec42 Mon Sep 17 00:00:00 2001
From: tildearrow <me@tildearrow.org>
Date: Mon, 21 Aug 2023 23:57:07 -0500
Subject: [PATCH] dev167 - fix TL macro

previously, 127 mapped to TL 0
but now 127 maps to TL 127

yeah, the graph will look inverted I know...
---
 src/engine/engine.h                |  4 ++--
 src/engine/instrument.cpp          | 16 ++++++++++++++++
 src/engine/platform/arcade.cpp     |  2 +-
 src/engine/platform/genesis.cpp    |  2 +-
 src/engine/platform/genesisext.cpp |  2 +-
 src/engine/platform/opl.cpp        |  2 +-
 src/engine/platform/opll.cpp       |  2 +-
 src/engine/platform/tx81z.cpp      |  2 +-
 src/engine/platform/ym2203.cpp     |  2 +-
 src/engine/platform/ym2203ext.cpp  |  2 +-
 src/engine/platform/ym2608.cpp     |  2 +-
 src/engine/platform/ym2608ext.cpp  |  2 +-
 src/engine/platform/ym2610.cpp     |  2 +-
 src/engine/platform/ym2610b.cpp    |  2 +-
 src/engine/platform/ym2610bext.cpp |  2 +-
 src/engine/platform/ym2610ext.cpp  |  2 +-
 16 files changed, 32 insertions(+), 16 deletions(-)

diff --git a/src/engine/engine.h b/src/engine/engine.h
index e5538f72..3a297217 100644
--- a/src/engine/engine.h
+++ b/src/engine/engine.h
@@ -56,8 +56,8 @@
 
 #define DIV_UNSTABLE
 
-#define DIV_VERSION "dev166"
-#define DIV_ENGINE_VERSION 166
+#define DIV_VERSION "dev167"
+#define DIV_ENGINE_VERSION 167
 // for imports
 #define DIV_VERSION_MOD 0xff01
 #define DIV_VERSION_FC 0xff02
diff --git a/src/engine/instrument.cpp b/src/engine/instrument.cpp
index 3931a6f5..34a77f5e 100644
--- a/src/engine/instrument.cpp
+++ b/src/engine/instrument.cpp
@@ -2261,6 +2261,13 @@ void DivInstrument::readFeatureOx(SafeReader& reader, int op, short version) {
         }
         break;
     }
+
+    // <167 TL macro compat
+    if (macroCode==6 && version<167) {
+      for (int i=0; i<target->len; i++) {
+        target->val[i]^=0x7f;
+      }
+    }
   }
 
   READ_FEAT_END;
@@ -3319,6 +3326,15 @@ DivDataErrors DivInstrument::readInsDataOld(SafeReader &reader, short version) {
     }
   }
 
+  // <167 TL macro compat
+  if (version<167) {
+    for (int i=0; i<4; i++) {
+      for (int j=0; j<std.opMacros[i].tlMacro.len; j++) {
+        std.opMacros[i].tlMacro.val[j]^=0x7f;
+      }
+    }
+  }
+
   return DIV_DATA_SUCCESS;
 }
 
diff --git a/src/engine/platform/arcade.cpp b/src/engine/platform/arcade.cpp
index 20110b9d..29b62e30 100644
--- a/src/engine/platform/arcade.cpp
+++ b/src/engine/platform/arcade.cpp
@@ -299,7 +299,7 @@ void DivPlatformArcade::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (!op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else if (KVS(i,j)) {
diff --git a/src/engine/platform/genesis.cpp b/src/engine/platform/genesis.cpp
index 3ce42299..eb0c956b 100644
--- a/src/engine/platform/genesis.cpp
+++ b/src/engine/platform/genesis.cpp
@@ -473,7 +473,7 @@ void DivPlatformGenesis::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (isMuted[i] || !op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else {
diff --git a/src/engine/platform/genesisext.cpp b/src/engine/platform/genesisext.cpp
index e6a9cd14..0b6721b0 100644
--- a/src/engine/platform/genesisext.cpp
+++ b/src/engine/platform/genesisext.cpp
@@ -599,7 +599,7 @@ void DivPlatformGenesisExt::tick(bool sysTick) {
       rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
     }
     if (m.tl.had) {
-      op.tl=127-m.tl.val;
+      op.tl=m.tl.val;
       if (isOpMuted[i]) {
         rWrite(baseAddr+ADDR_TL,127);
       } else {
diff --git a/src/engine/platform/opl.cpp b/src/engine/platform/opl.cpp
index 6c3fa416..51e4131e 100644
--- a/src/engine/platform/opl.cpp
+++ b/src/engine/platform/opl.cpp
@@ -436,7 +436,7 @@ void DivPlatformOPL::tick(bool sysTick) {
       }
 
       if (m.tl.had) {
-        op.tl=63-m.tl.val;
+        op.tl=m.tl.val&63;
       }
       if (m.ksl.had) {
         op.ksl=m.ksl.val;
diff --git a/src/engine/platform/opll.cpp b/src/engine/platform/opll.cpp
index 2d283d9a..1c7dc72e 100644
--- a/src/engine/platform/opll.cpp
+++ b/src/engine/platform/opll.cpp
@@ -195,7 +195,7 @@ void DivPlatformOPLL::tick(bool sysTick) {
           rWrite(0x06+j,(op.sl<<4)|(op.rr));
         }
         if (m.tl.had) {
-          op.tl=((j==1)?15:63)-m.tl.val;
+          op.tl=m.tl.val&((j==1)?15:63);
           if (j==1) {
             if (i<9) {
               rWrite(0x30+i,((15-VOL_SCALE_LOG_BROKEN(chan[i].outVol,15-chan[i].state.op[1].tl,15))&15)|(chan[i].state.opllPreset<<4));
diff --git a/src/engine/platform/tx81z.cpp b/src/engine/platform/tx81z.cpp
index 6e70895b..8577d455 100644
--- a/src/engine/platform/tx81z.cpp
+++ b/src/engine/platform/tx81z.cpp
@@ -262,7 +262,7 @@ void DivPlatformTX81Z::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (isMuted[i] || !op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else {
diff --git a/src/engine/platform/ym2203.cpp b/src/engine/platform/ym2203.cpp
index 02e92e19..2e805f3c 100644
--- a/src/engine/platform/ym2203.cpp
+++ b/src/engine/platform/ym2203.cpp
@@ -402,7 +402,7 @@ void DivPlatformYM2203::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (isMuted[i] || !op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else {
diff --git a/src/engine/platform/ym2203ext.cpp b/src/engine/platform/ym2203ext.cpp
index 4791d513..349c8a82 100644
--- a/src/engine/platform/ym2203ext.cpp
+++ b/src/engine/platform/ym2203ext.cpp
@@ -502,7 +502,7 @@ void DivPlatformYM2203Ext::tick(bool sysTick) {
       rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
     }
     if (m.tl.had) {
-      op.tl=127-m.tl.val;
+      op.tl=m.tl.val;
       if (isOpMuted[i]) {
         rWrite(baseAddr+ADDR_TL,127);
       } else {
diff --git a/src/engine/platform/ym2608.cpp b/src/engine/platform/ym2608.cpp
index 183533f8..d88c1437 100644
--- a/src/engine/platform/ym2608.cpp
+++ b/src/engine/platform/ym2608.cpp
@@ -606,7 +606,7 @@ void DivPlatformYM2608::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (isMuted[i] || !op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else {
diff --git a/src/engine/platform/ym2608ext.cpp b/src/engine/platform/ym2608ext.cpp
index 3bc14a39..2966f9df 100644
--- a/src/engine/platform/ym2608ext.cpp
+++ b/src/engine/platform/ym2608ext.cpp
@@ -549,7 +549,7 @@ void DivPlatformYM2608Ext::tick(bool sysTick) {
       rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
     }
     if (m.tl.had) {
-      op.tl=127-m.tl.val;
+      op.tl=m.tl.val;
       if (isOpMuted[i]) {
         rWrite(baseAddr+ADDR_TL,127);
       } else {
diff --git a/src/engine/platform/ym2610.cpp b/src/engine/platform/ym2610.cpp
index 5a1d80b5..0690c971 100644
--- a/src/engine/platform/ym2610.cpp
+++ b/src/engine/platform/ym2610.cpp
@@ -539,7 +539,7 @@ void DivPlatformYM2610::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (isMuted[i] || !op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else {
diff --git a/src/engine/platform/ym2610b.cpp b/src/engine/platform/ym2610b.cpp
index d65e5014..ca67f2c3 100644
--- a/src/engine/platform/ym2610b.cpp
+++ b/src/engine/platform/ym2610b.cpp
@@ -606,7 +606,7 @@ void DivPlatformYM2610B::tick(bool sysTick) {
         rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
       }
       if (m.tl.had) {
-        op.tl=127-m.tl.val;
+        op.tl=m.tl.val;
         if (isMuted[i] || !op.enable) {
           rWrite(baseAddr+ADDR_TL,127);
         } else {
diff --git a/src/engine/platform/ym2610bext.cpp b/src/engine/platform/ym2610bext.cpp
index 48bb24fd..2252a09d 100644
--- a/src/engine/platform/ym2610bext.cpp
+++ b/src/engine/platform/ym2610bext.cpp
@@ -544,7 +544,7 @@ void DivPlatformYM2610BExt::tick(bool sysTick) {
       rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
     }
     if (m.tl.had) {
-      op.tl=127-m.tl.val;
+      op.tl=m.tl.val;
       if (isOpMuted[i]) {
         rWrite(baseAddr+ADDR_TL,127);
       } else {
diff --git a/src/engine/platform/ym2610ext.cpp b/src/engine/platform/ym2610ext.cpp
index 3c18a6e4..1713114b 100644
--- a/src/engine/platform/ym2610ext.cpp
+++ b/src/engine/platform/ym2610ext.cpp
@@ -544,7 +544,7 @@ void DivPlatformYM2610Ext::tick(bool sysTick) {
       rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
     }
     if (m.tl.had) {
-      op.tl=127-m.tl.val;
+      op.tl=m.tl.val;
       if (isOpMuted[i]) {
         rWrite(baseAddr+ADDR_TL,127);
       } else {