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Stop / reset Y8950 ADPCM before restarting.

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The emulation core treats every write to register 7 with start bit set as
a retrigger. This is not how the real hardware behaves.
This commit is contained in:
Laurens Holst 2022-05-24 22:09:36 +02:00
parent a19090ab9b
commit 4b4bc98417
1 changed files with 2 additions and 0 deletions
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2
src/engine/platform/opl.cpp
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@ -735,6 +735,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
if (chan[c.chan].sample>=0 && chan[c.chan].sample<parent->song.sampleLen) { if (chan[c.chan].sample>=0 && chan[c.chan].sample<parent->song.sampleLen) {
DivSample* s=parent->getSample(chan[c.chan].sample); DivSample* s=parent->getSample(chan[c.chan].sample);
immWrite(8,0); immWrite(8,0);
immWrite(7,0x01); // reset
immWrite(9,(s->offB>>2)&0xff); immWrite(9,(s->offB>>2)&0xff);
immWrite(10,(s->offB>>10)&0xff); immWrite(10,(s->offB>>10)&0xff);
int end=s->offB+s->lengthB-1; int end=s->offB+s->lengthB-1;
@ -770,6 +771,7 @@ int DivPlatformOPL::dispatch(DivCommand c) {
} }
DivSample* s=parent->getSample(12*sampleBank+c.value%12); DivSample* s=parent->getSample(12*sampleBank+c.value%12);
immWrite(8,0); immWrite(8,0);
immWrite(7,0x01); // reset
immWrite(9,(s->offB>>2)&0xff); immWrite(9,(s->offB>>2)&0xff);
immWrite(10,(s->offB>>10)&0xff); immWrite(10,(s->offB>>10)&0xff);
int end=s->offB+s->lengthB-1; int end=s->offB+s->lengthB-1;