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VRC6: 19 to 14
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4cf4635e85
commit
3eba7721a4
2 changed files with 25 additions and 19 deletions
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@ -11,7 +11,7 @@
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void vrcvi_core::tick()
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{
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m_out = 0;
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if (!m_control.halt()) // Halt flag
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if (!m_control.m_halt) // Halt flag
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{
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// tick per each clock
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m_out += m_pulse[0].get_output(); // add 4 bit pulse output
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@ -36,7 +36,7 @@ void vrcvi_core::reset()
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bool vrcvi_core::alu_t::tick()
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{
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if (m_divider.enable())
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if (m_divider.m_enable)
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{
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const u16 temp = m_counter;
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// post decrement
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@ -44,42 +44,48 @@ bool vrcvi_core::alu_t::tick()
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{
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m_counter = (m_counter & 0x0ff) | (bitfield(bitfield(m_counter, 8, 4) - 1, 0, 4) << 8);
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m_counter = (m_counter & 0xf00) | (bitfield(bitfield(m_counter, 0, 8) - 1, 0, 8) << 0);
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if (bitfield(temp, 8, 4) == 0)
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{
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m_counter = m_divider.m_divider;
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return true;
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}
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}
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else if (m_host.m_control.m_shift&1)
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{
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m_counter = (m_counter & 0x00f) | (bitfield(bitfield(m_counter, 4, 8) - 1, 0, 8) << 4);
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m_counter = (m_counter & 0xff0) | (bitfield(bitfield(m_counter, 0, 4) - 1, 0, 4) << 0);
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if (bitfield(temp, 4, 8) == 0)
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{
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m_counter = m_divider.m_divider;
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return true;
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}
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}
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else
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{
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m_counter = (m_counter-1)&0xfff; //bitfield(bitfield(m_counter, 0, 12) - 1, 0, 12);
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if (!(temp&0xfff)) {
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m_counter = m_divider.m_divider;
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return true;
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}
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}
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// carry handling
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const bool carry = bitfield(m_host.m_control.shift(), 1)
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? (bitfield(temp, 8, 4) == 0)
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: (bitfield(m_host.m_control.shift(), 0) ? (bitfield(temp, 4, 8) == 0)
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: (bitfield(temp, 0, 12) == 0));
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if (carry)
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{
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m_counter = m_divider.divider();
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}
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return carry;
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return false;
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}
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return false;
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}
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bool vrcvi_core::pulse_t::tick()
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{
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if (!m_divider.enable())
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if (!m_divider.m_enable)
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{
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return false;
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}
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if (vrcvi_core::alu_t::tick())
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{
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m_cycle = bitfield(m_cycle + 1, 0, 4);
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m_cycle = (m_cycle+1)&15;
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}
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return m_control.mode() ? true : ((m_cycle > m_control.duty()) ? true : false);
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@ -87,7 +93,7 @@ bool vrcvi_core::pulse_t::tick()
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bool vrcvi_core::sawtooth_t::tick()
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{
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if (!m_divider.enable())
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if (!m_divider.m_enable)
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{
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return false;
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}
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@ -204,7 +210,7 @@ void vrcvi_core::pulse_w(u8 voice, u8 address, u8 data)
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break;
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case 0x02: // Pitch MSB, Enable/Disable - 0x9002/0x9001 (Pulse 1), 0xa002/0xa001 (Pulse 2)
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v.divider().write(true, data);
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if (!v.divider().enable())
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if (!v.divider().m_enable)
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{ // Reset duty cycle
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v.clear_cycle();
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}
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@ -224,7 +230,7 @@ void vrcvi_core::saw_w(u8 address, u8 data)
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break;
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case 0x02: // Pitch MSB, Enable/Disable - 0xb002/0xb001 (Sawtooth)
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m_sawtooth.divider().write(true, data);
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if (!m_sawtooth.divider().enable())
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if (!m_sawtooth.divider().m_enable)
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{ // Reset accumulator
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m_sawtooth.clear_accum();
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}
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@ -58,7 +58,7 @@ class vrcvi_core : public vgsound_emu_core
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inline bool enable() { return m_enable; }
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private:
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public:
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u16 m_divider : 12; // divider (pitch)
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u16 m_enable : 1; // channel disable flag
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};
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